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low power, wide supply range, low cost difference amplifiers, g = ?, 2 preliminary technical data AD8279 rev. pra information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved. features wide input range beyond supplies rugged input overvoltage protection low supply current: 200 a maximum low power dissipation: 0.5 mw at v s = 2.5 v bandwidth: 1 mhz (g = ?) cmrr: 80 db minimum, dc to 20 khz (g = ?) low offset voltage drift: 2 v/c maximum (b grade) low gain drift: 1 ppm/c maximum (b grade) enhanced slew rate: 1.4 v/s wide power supply range: single supply: 2 v to 36 v dual supplies: 2 v to 18 v applications voltage measurement and monitoring current measurement and monitoring instrumentation amplifier building block portable, battery-powered equipment test and measurement general description the AD8279 consists of two general-purpose difference amplifiers intended for precision signal conditioning in power critical applications that require both high performance and low power. the AD8279 provides exceptional common-mode rejection ratio (80 db) and high bandwidth while amplifying signals well beyond the supply rails. the on-chip resistors are laser-trimmed for excellent gain accuracy and high cmrr. they also have extremely low gain drift vs. temperature. the common-mode range of the amplifiers extend to almost triple the supply voltage (for g = ?), making them ideal for single-supply applications that require a high common-mode voltage range. the internal resistors and esd circuitry at the inputs also provide overvoltage protection to the op amp. the AD8279 can be used as difference amplifiers with g = ? or g = 2. it can also be connected in a high precision, single-ended configuration for non-inverting and inverting gains of ??, ?2, +3, +2, +1?, +1, or +?. the AD8279 provide an integrated precision solution that has a smaller size, lower cost, and better performance than a discrete alternative. functional block diagram figure 1. the AD8279 operates on single supplies (2.0 v to 36 v) or dual supplies (2 v to 18 v). the maximum quiescent supply current is 200 a per channel, which is ideal for battery-operated and portable systems. the AD8279 is available in a 14-lead soic package. it is specified for performance over the industrial temperature range of ?40c to +85c and are fully rohs compliant. table 1. difference amplifiers by category low distortion high voltage current sensing 1 low power ad8270 ad628 ad8202 (u) ad8276 ad8271 ad629 ad8203 (u) ad8277 ad8273 ad8205 (b) ad8278 ad8274 ad8206 (b) AD8279 amp03 ad8216 (b) 1 u = unidirectional, b = bidirectional.
AD8279 preliminary technical data rev. pra | page 2 of 18 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 7 ? thermal resistance ...................................................................... 7 ? maximum power dissipation ..................................................... 7 ? short-circuit current .................................................................. 7 ? esd caution...................................................................................7 ? pin configurations and function descriptions ............................8 ? typical performance characteristics ..............................................9 ? theory of operation ...................................................................... 16 ? circuit information .................................................................... 16 ? driving the AD8279 ................................................................... 16 ? input voltage range ................................................................... 16 ? power supplies ............................................................................ 17 ? outline dimensions ....................................................................... 18 ? revision history
preliminary technical data AD8279 rev. pra | page 3 of 18 specifications v s = 5 v to 15 v, v ref = 0 v, t a = 25c, r l = 10 k connected to ground, g = ? difference amplifier configuration, unless otherwise noted. table 2. parameter conditions g = ? unit grade b grade a min typ max min typ max input characteristics system offset 1 50 100 50 250 v vs. temperature t a = ?40c to +85c 100 250 v average temperature coefficient t a = ?40c to +85c 0.3 1 2 5 v/c vs. power supply v s = 5 v to 18 v 2.5 5 v/v common-mode rejection ratio (rti) v s = 15 v, v cm = 27 v, r s = 0 80 74 db input voltage range 2 ?3(v s + 0.1) +3(v s ? 1.5) ?3(v s + 0.1) +3(v s ? 1.5) v impedance 3 differential 120 120 k common mode 30 30 k dynamic performance bandwidth 1 1 mhz slew rate 1.1 1.4 1.1 1.4 v/s settling time to 0.01% 10 v step on output, c l = 100 pf 9 9 s settling time to 0.001% 10 10 s channel separation f = 1 khz 130 130 db gain gain error 0.005 0.02 0.01 0.05 % gain drift t a = ?40c to +85c 1 5 ppm/c gain nonlinearity v out = 20 v p-p 5 10 ppm output characteristics output voltage swing 4 v s = 15 v, r l = 10 k t a = ?40c to +85c ?v s + 0.2 +v s ? 0.2 ?v s + 0.2 +v s ? 0.2 v short-circuit current limit 15 15 ma capacitive load drive 200 200 pf noise 5 output voltage noise f = 0.1 hz to 10 hz 1.4 1.4 v p-p f = 1 khz 47 50 47 50 nv/hz power supply supply current 6 200 200 a vs. temperature t a = ?40c to +85c 250 250 a operating voltage range 7 2 18 2 18 v temperature range operating range ?40 +125 ?40 +125 c 1 includes input bias and offset cu rrent errors, rto (referred to output) 2 the input voltage range may also be limit ed by absolute maximum input voltage or by the output swing. see the input voltage range section in the theory of operation for details. 3 internal resistors are trimme d to be ratio matched and have 20% absolute accuracy. 4 output voltage swing varies with supply voltage and temperature. see figure 19 through figure 22 for details. 5 includes amplifier voltage and current noise, as well as noise from inte rnal resistors. 6 supply current varies with supply voltage and temp erature. see figure 23 and figure 25 for details. 7 unbalanced dual supplies can be used, such as ?v s = ?0.5 v and +v s = +2 v. the positive supply rail must be at least 2 v above the negative supply and reference voltage.
AD8279 preliminary technical data rev. pra | page 4 of 18 v s = 5 v to 15 v, v ref = 0 v, t a = 25c, r l = 10 k connected to ground, g = 2 difference amplifier configuration, unless otherwise noted. table 3. parameter conditions g = 2 unit grade b grade a min typ max min typ max input characteristics system offset 1 100 200 100 500 v vs. temperature t a = ?40c to +85c 200 500 v average temperature coefficient t a = ?40c to +85c 0.6 2 2 5 v/c vs. power supply v s = 5 v to 18 v 5 10 v/v common-mode rejection ratio (rti) v s = 15 v, v cm = 27 v, r s = 0 86 80 db input voltage range 2 ?1.5(v s + 0.1) +1.5(v s ? 1.5) ?1.5(v s + 0.1) +1.5(v s ? 1.5) v impedance 3 differential 120 120 k common mode 30 30 k dynamic performance bandwidth 550 550 khz slew rate 1.1 1.4 1.1 1.4 v/s settling time to 0.01% 10 v step on output, c l = 100 pf 10 10 s settling time to 0.001% 11 11 s channel separation f = 1 khz 130 130 db gain gain error 0.005 0.02 0.01 0.05 % gain drift t a = ?40c to +85c 1 5 ppm/ c gain nonlinearity v out = 20 v p-p 5 10 ppm output characteristics output voltage swing 4 v s = 15 v, r l = 10 k t a = ?40c to +85c ?v s + 0.2 +v s ? 0.2 ?v s + 0.2 +v s ? 0.2 v short-circuit current limit 15 15 ma capacitive load drive 350 350 pf noise 5 output voltage noise f = 0.1 hz to 10 hz 2.8 2.8 v p-p f = 1 khz 90 95 90 95 nv/hz power supply supply current 6 200 200 a vs. temperature t a = ?40c to +85c 250 250 a operating voltage range 7 2 18 2 18 v temperature range operating range ?40 +125 ?40 +125 c 1 includes input bias and offset curre nt errors, rto (referred to output). 2 the input voltage range may also be limit ed by absolute maximum input voltage or by the output swing. see the input voltage range section in the theory of operation for details. 3 internal resistors are trimme d to be ratio matched and have 20% absolute accuracy. 4 output voltage swing varies with supply voltage and temperature. see figure 19 through figure 22 for details. 5 includes amplifier voltage and current noise, as well as noise from inte rnal resistors. 6 supply current varies with supply voltage and temp erature. see figure 23 and figure 25 for details. 7 unbalanced dual supplies can be used, such as ?v s = ?0.5 v and +v s = +2 v. the positive supply rail must be at least 2 v above the negative supply and reference voltage.
preliminary technical data AD8279 rev. pra | page 5 of 18 v s = +2.7 v to <5 v, v ref = midsupply, t a = 25c, r l = 10 k connected to midsupply, g = ? difference amplifier configuration, unless otherwise noted. table 4. parameter conditions g = ? unit grade b grade a min typ max min typ max input characteristics system offset 1 75 150 75 250 v vs. temperature t a = ?40c to +85c 150 250 v average temperature coefficient t a = ?40c to +85c 0.3 1 2 5 v/c vs. power supply v s = 5 v to 18 v 2.5 5 v/v common-mode rejection ratio (rti) v s = 2.7 v, v cm = 0 v to 2.4 v, r s = 0 80 74 db v s = 5 v, v cm = ?10 v to +7 v, r s = 0 80 74 db input voltage range 2 ?3(v s + 0.1) +3(v s ? 1.5) ?3(v s + 0.1) +3(v s ? 1.5) v impedance 3 differential 120 120 k common mode 30 30 k dynamic performance bandwidth 870 870 khz slew rate 1.3 1.3 v/s settling time to 0.01% 2 v step on output, c l = 100 pf, v s = 2.7 v 7 7 s channel separation f = 1 khz 130 130 db gain gain error 0.005 0.02 0.01 0.05 % gain drift t a = ?40c to +85c 1 5 ppm/c output characteristics output swing 4 r l = 10 k , t a = ?40c to +85c ?v s + 0.1 +v s ? 0.15 ?v s + 0.1 +v s ? 0.15 v short-circuit current limit 10 10 ma capacitive load drive 200 200 pf noise 5 output voltage noise f = 0.1 hz to 10 hz 1.4 1.4 v p-p f = 1 khz 47 50 47 50 nv/hz power supply supply current 6 t a = ?40c to +85c 200 200 a operating voltage range 2.0 36 2.0 36 v temperature range operating range ?40 +125 ?40 +125 c 1 includes input bias and offset curre nt errors, rto (referred to output). 2 the input voltage range may also be limited by absolute maximum input voltage or by the output swing. see the input voltage ra nge section in the theory of operation section for details. 3 internal resistors are trimme d to be ratio matched and have 20% absolute accuracy. 4 output voltage swing varies with supply voltage and temperature. see figure 19 through figure 22 for details. 5 includes amplifier voltage and current noise, as well as noise from inte rnal resistors. 6 supply current varies with supply voltage and temp erature. see figure 24 and figure 25 for details.
AD8279 preliminary technical data rev. pra | page 6 of 18 v s = +2.7 v to <5 v, v ref = midsupply, t a = 25c, r l = 10 k connected to midsupply, g = 2 difference amplifier configuration, unless otherwise noted. table 5. parameter conditions g = 2 unit grade b grade a min typ max min typ max input characteristics system offset 1 150 300 150 500 v vs. temperature t a = ?40c to +85c 300 500 v average temperature coefficient t a = ?40c to +85c 0.6 2 3 5 v/c vs. power supply v s = 5 v to 18 v 5 10 v/v common-mode rejection ratio (rti) v s = 2.7 v, v cm = 0 v to 2.4 v, r s = 0 86 80 db v s = 5 v, v cm = ?10 v to +7 v, r s = 0 86 80 db input voltage range 2 ?1.5(v s + 0.1) +1.5(v s ? 1.5) ?1.5(v s + 0.1) +1.5(v s ? 1.5) v impedance 3 differential 120 120 k common mode 30 30 k dynamic performance bandwidth 450 450 khz slew rate 1.3 1.3 v/s settling time to 0.01% 2 v step on output, c l = 100 pf, v s = 2.7 v 9 9 s channel separation f = 1 khz 130 130 db gain gain error 0.005 0.02 0.01 0.05 % gain drift t a = ?40c to +85c 1 5 ppm/c output characteristics output swing 4 r l = 10 k, t a = ?40c to +85c ?v s + 0.1 +v s ? 0.15 ?v s + 0.1 +v s ? 0.15 v short-circuit current limit 10 10 ma capacitive load drive 200 200 pf noise 5 output voltage noise f = 0.1 hz to 10 hz 2.8 2.8 v p-p f = 1 khz 94 100 94 100 nv/hz power supply supply current 6 t a = ?40c to +85c 200 220 a operating voltage range 2.0 36 2.0 36 v temperature range operating range ?40 +125 ?40 +125 c 1 includes input bias and offset curre nt errors, rto (referred to output). 2 the input voltage range may also be limited by absolute maximum input voltage or by the output swing. see the input voltage ra nge section in the theory of operation section for details. 3 internal resistors are trimme d to be ratio matched and have 20% absolute accuracy. 4 output voltage swing varies with supply voltage and temperature. see figure 19 through figure 22 for details. 5 includes amplifier voltage and current noise, as well as noise from inte rnal resistors. 6 supply current varies with supply voltage and temp erature. see figure 24 and figure 25 for details.
preliminary technical data AD8279 rev. pra | page 7 of 18 absolute maximum ratings table 6. parameter rating supply voltage 18 v maximum voltage at any input pin ?v s + 40 v minimum voltage at any input pin +v s ? 40 v storage temperature range ?65c to +150c specified temperature range ?40c to +85c package glass transition temperature (t g ) 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance the ja values in table 7 assume a 4-layer jedec standard board with zero airflow. table 7. thermal resistance package type ja unit 14-lead soic 105 c/w maximum power dissipation the maximum safe power dissipation for the AD8279 is limited by the associated rise in junction temperature (t j ) on the die. at approximately 150c, which is the glass transition temperature, the properties of the plastic change. even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. exceeding a temperature of 150c for an extended period may result in a loss of functionality. 2.0 1.6 1.2 0.8 0.4 0 ?50 0 ?25 25 50 75 100 125 maximum power dissipation (w) ambient temerature (c) t j max = 150c 8-lead msop ja = 135c/w 8-lead soic ja = 121c/w 07692-002 14-lead soic ja = 105c/w figure 2. maximum power dissipation vs. ambient temperature short-circuit current the AD8279 has built-in, short-circui t protection that limits the output current (see figure 26 for more information). while the short-circuit condition itself does not damage the part, the heat generated by the condition can cause the part to exceed its maximum junction temperature, with corresponding negative effects on reliability. figure 2 and figure 26, combined with knowledge of the supply voltages and ambient temperature of the part can be used to determine whether a short circuit will cause the part to exceed its maximum junction temperature. esd caution
AD8279 preliminary technical data rev. pra | page 8 of 18 pin configurations and function descriptions nc 1 ?ina 2 +ina 3 ?vs 4 refa 14 outa 13 sensea 12 +vs 11 +inb 5 senseb 10 ?inb 6 outb 9 nc 7 refb 8 nc = no connect ad8277 top view (not to scale) 07692-053 figure 3. AD8279 14-lead soic pin configuration table 8. AD8279 pin function descriptions pin no. mnemonic description 1 nc no connect. 2 ?ina channel a inverting input. 3 +ina channel a noninverting input. 4 ?vs negative supply. 5 +inb channel b noninverting input. 6 ?inb channel b inverting input. 7 nc no connect. 8 refb channel b reference voltage input. 9 outb channel b output. 10 senseb channel b sense terminal. 11 +vs positive supply. 12 sensea channel a sense terminal. 13 outa channel a output. 14 refa channel a reference voltage input. AD8279
preliminary technical data AD8279 rev. pra | page 9 of 18 typical performance characteristics v s = 15 v, t a = 25c, r l = 10 k connected to ground, g = ? difference amplifier configuration, unless otherwise noted. 600 500 400 300 200 100 0 ?150 ?100 ?50 0 50 100 150 number of hits system offset voltage (v) 08308-005 n = 3840 mean = ?16.8 sd = 41.7673 figure 4. distribution of typical system offset voltage, g = 2 800 600 700 500 400 300 200 100 0 ?60 ?40 ?20 0 20 40 60 number of hits cmrr (v/v) 08308-006 n = 3837 mean = 7.78 sd = 13.569 figure 5. distribution of typica l common-mode rejection, g = 2 10 ?20 ?15 ?10 ?5 0 5 ?50?35?20?5102540557085 cmrr (v/v) temperature (c) 08308-007 representative data figure 6. cmrr vs. temperature, normalized at 25c, g = ? 80 ?100 ?80 ?60 ?40 ?20 0 20 40 60 ?50 ?35 ?20 ?5 10 25 40 55 70 85 system offset (v) temperature (c) representative data 08308-008 figure 7. system offset vs. temper ature, normalized at 25, g = ? 20 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 ?50 ?35 ?20 ?5 10 25 40 55 70 85 gain error (v/v) temperature (c) representative data 08308-009 figure 8. gain error vs. temperature, normalized at 25c, g = ? 30 ?30 ?20 ?10 0 10 20 ?20 ?15 ?10 ?5 0 5 10 15 20 common-mode voltage (v) output voltage (v) v s = 15v v s = 5v 08308-010 figure 9. input common-mode voltage vs. output voltage, 15 v and 5 v supplies, g = ?
AD8279 preliminary technical data rev. pra | page 10 of 18 10 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 ?0.5 0.5 1.5 2.5 3.5 4.5 5.5 common-mode voltage (v) output voltage (v) v s = 5v v ref = midsupply v s = 2.7v 08308-011 figure 10. input common-mode voltage vs. output voltage, 5 v and 2.7 v supplies, v ref = midsupply, g = ? 12 ?6 ?4 ?2 0 2 4 6 8 10 ?0.5 0.5 1.5 2.5 3.5 4.5 5.5 common-mode voltage (v) output voltage (v) v s = 5v v s = 2.7v 08308-012 v ref = 0v figure 11. input common-mode voltage vs. output voltage, 5 v and 2.7 v supplies, v ref = 0 v, g = ? 30 ?30 ?20 ?10 0 10 20 ?20 ?15 ?10 ?5 0 10 20 51 5 common-mode voltage (v) output voltage (v) v s = 5v v s = 15v 08308-013 figure 12. input common-mode voltage vs. output voltage, 15 v and 5 v supplies, g = 2 5 ?3 ?2 ?1 0 1 2 3 4 ?0.5 0.5 1.5 2.5 3.5 4.5 5.5 common-mode voltage (v) output voltage (v) v s = 5v v s = 2.7v 08308-014 v ref = midsupply figure 13. input common-mode voltage vs. output voltage, 5 v and 2.7 v supplies, v ref = midsupply, g = 2 6 5 ?2 ?1 0 1 2 3 4 ?0.5 0.5 1.5 2.5 3.5 4.5 5.5 common-mode voltage (v) output voltage (v) v s = 5v v s = 2.7v 08308-015 v ref = 0v figure 14. input common-mode voltage vs. output voltage, 5 v and 2.7 v supplies, v ref = 0 v, g = 2 18 ?36 ?30 ?24 ?18 ?12 ?6 0 6 12 100 10m 1m 100k 10k 1k gain (db) frequency (hz) gain = 2 gain = ? 08308-016 figure 15. gain vs. frequency, 15 v supplies
preliminary technical data AD8279 rev. pra | page 11 of 18 18 ?36 ?30 ?24 ?18 ?12 ?6 0 6 12 100 10m 1m 100k 10k 1k gain (db) frequency (hz) gain = 2 gain = ? 08308-017 figure 16. gain vs. frequenc y, +2.7 v single supply 120 100 80 60 40 20 0 11 m 100k 10k 1k 100 10 cmrr (db) frequency (hz) gain = 2 gain = ? 08308-018 figure 17. cmrr vs. frequency 120 100 80 60 40 20 0 11 m 100k 10k 1k 100 10 psrr (db) frequency (hz) ?psrr +psrr 08308-019 figure 18. psrr vs. frequency +v s ?0.1 ?0.2 ?0.3 ?0.4 ?v s +0.1 +0.2 +0.3 +0.4 21 8 16141210 864 output voltage swing (v) referred to supply voltages supply voltage (v s ) t a = ?40c t a = +25c t a = +85c t a = +125c 08308-020 figure 19. output voltage swing vs. supply voltage and temperature, r l = 10 k +v s ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 ?1.2 ?v s +0.2 +0.4 +0.6 +0.8 +1.0 +1.2 output voltage swing (v) referred to supply voltages supply voltage (v s ) t a = ?40c t a = +25c t a = +85c t a = +125c 21 8 16141210 864 08308-021 figure 20. output voltage swing vs. supply voltage and temperature, r l = 2 k +v s ?4 ?8 ?v s +4 +8 output voltage swing (v) referred to supply voltages load resistance ( ? ) 1k 100k 10k t a = ?40c t a = +25c t a = +85c t a = +125c 08308-022 figure 21. output voltage swing vs. r l and temperature, v s = 15 v
AD8279 preliminary technical data rev. pra | page 12 of 18 +v s ?0.5 ?1.0 ?1.5 ?2.0 ?v s +0.5 +1.0 +1.5 +2.0 output voltage swing (v) referred to supply voltages output current (ma) 01 0 987654321 t a = ?40c t a = +25c t a = +85c t a = +125c 08308-023 figure 22. output voltage swing vs. i out and temperature, v s = 15 v 180 160 170 150 140 130 120 01 8 16 1412 10 8642 supply current (a) supply voltage (v) 08308-024 figure 23. supply current per ch annel vs. dual-supply voltage, v in = 0 v 180 160 170 150 140 130 120 04 0 353025201510 5 supply current (a) supply voltage (v) 08308-025 figure 24. supply current per cha nnel vs. single-supply voltage, v in = 0 v, v ref = 0 v 250 150 200 100 50 0 ?50 ?30 ?10 10 30 50 70 90 110 130 supply current (a) temperature (c) v s = 15v v s = +2.7v v ref = midsupply 08308-026 figure 25. supply current per channel vs. temperature 30 25 20 15 10 5 0 ?5 ?10 ?15 ?20 ?50 ?30 ?10 10 30 50 70 90 110 130 short-circuit current (ma) temperature (c) i short+ i short? 08308-027 figure 26. short-circuit current per channel vs. temperature 2.0 1.6 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ?50 ?30 ?10 10 30 50 70 90 110 130 slew rate (v/s) temperature (c) ?slew rate +slew rate 08308-028 figure 27. slew rate vs. temperature, v in = 20 v p-p, 1 khz
preliminary technical data AD8279 rev. pra | page 13 of 18 8 ?8 ?6 ?4 ?2 0 2 4 6 ?5?4?3?2?1012345 nonlinearity (2ppm/div) output voltage (v) 08308-029 figure 28. gain nonlinearity, v s = 15 v, r l 2 k, g = ? 8 ?8 ?6 ?4 ?2 0 2 4 6 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 nonlinearity (2ppm/div) output voltage (v) 08308-030 figure 29. gain nonlinearity, v s = 15 v, r l 2 k, g = 2 time (s) 5v/div 40s/div 0.002%/div 6.24s to 0.01% 7.92s to 0.001% 0 8308-031 figure 30. large-signal pulse response and settling time, 10 v step, v s = 15 v, g = ? time (s) 1v/div 0.002%/div 3.64s to 0.01% 4.12s to 0.001% 4s/div 0 8308-032 figure 31. large-signal pulse response and settling time, 2 v step, v s = 2.7 v, g = ? time (s) 5v/div 0.002%/div 7.6s to 0.01% 9.68s to 0.001% 40s/div 0 8308-033 figure 32. large-signal pulse response and settling time, 10 v step, v s = 15 v, g = 2 time (s) 1v/div 0.002%/div 4.34s to 0.01% 5.12s to 0.001% 4s/div 08308-034 figure 33. large-signal pulse response and settling time, 2 v step, v s = 2.7 v
AD8279 preliminary technical data rev. pra | page 14 of 18 10s/div 2v/di v 08308-035 figure 34. large-signal step response, g = ? 10s/div 5v/di v 08308-036 figure 35. large-signal step response, g = 2 30 25 20 15 10 5 0 100 1m 100k 10k 1k output voltage (v p-p) frequency (hz) v s = 15v v s = 5v 08308-037 figure 36. maximum output voltage vs. frequency, v s = 15 v, 5 v 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 1m 100k 10k 1k output voltage (v p-p) frequency (hz) v s = 5v v s = 2.5v 08308-038 figure 37. maximum output voltage vs. frequency, v s = 5 v, 2.7 v 20mv/di v 40s/div no load r l = 200pf r l = 147pf r l = 247pf 08308-039 figure 38. small-signal step response for various capacitive loads, g = ? 20mv/di v 40s/div r l = 100pf r l = 200pf r l = 247pf r l = 347pf 08308-040 figure 39. small-signal step response for various capacitive loads, g = 2
preliminary technical data AD8279 rev. pra | page 15 of 18 50 45 40 35 30 25 20 15 10 5 0 02 5 0 150 200 100 50 overshoot (%) capacitive load (pf) 2v 5v 15v 18v 08308-041 figure 40. small-signal overshoot vs. capacitive load, r l 2 k, g = ? 35 30 25 20 15 10 5 0 03 5 0 150 250 300 200 100 50 overshoot (%) capacitive load (pf) 2v 5v 15v 18v 08308-042 figure 41. small-signal overshoot vs. capacitive load, r l 2 k, g = 2 1k 100 10 0.1 100k 10k 1k 100 10 1 noise (nv/ hz) frequency (hz) gain = 2 gain = ? 08308-043 figure 42. voltage noise density vs. frequency 1v/di v 1s/div gain = 2 gain = ? 08308-044 figure 43. 0.1 hz to 10 hz voltage noise
AD8279 preliminary technical data rev. pra | page 16 of 18 theory of operation circuit information each channel of the AD8279 consists of a low power, low noise op amp and four laser-trimmed on-chip resistors. these resistors can be externally connected to make a variety of amplifier configurations, including difference, noninverting, and inverting configurations. taking advantage of the integrated resistors of the AD8279 provides the designer with several benefits over a discrete design, including smaller size, lower cost, and better ac and dc performance. figure 44. functional block diagram dc performance much of the dc performance of op amp circuits depends on the accuracy of the surrounding resistors. using superposition to analyze a typical difference amplifier circuit, as is shown in figure 45, the output voltage is found to be ? ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? + = ? + r3 r4 v r3 r4 r2r1 r2 vv in in out 1 this equation demonstrates that the gain accuracy and common- mode rejection ratio of the AD8279 is determined primarily by the matching of resistor ratios. even a 0.1% mismatch in one resistor degrades the cmrr to 69 db for a g = 2 difference amplifier. the difference amplifier output voltage equation can be reduced to () ? + ? = in in out vv r3 r4 v as long as the following ratio of the resistors is tightly matched: r3 r4 r1 r2 = the resistors on the AD8279 are laser trimmed to match accurately. as a result, the AD8279 provides superior performance over a discrete solution, enabling better cmrr, gain accuracy, and gain drift, even over a wide temperature range. ac performance component sizes and trace lengths are much smaller in an ic than on a pcb, so the corresponding parasitic elements are also smaller. this results in better ac performance of the AD8279. for example, the positive and negative input terminals of the AD8279 op amps are intentionally not pinned out. by not connecting these nodes to the traces on the pcb, their capacitance remains low and balanced, resulting in improved loop stability and excellent common-mode rejection over frequency. driving the AD8279 care should be taken to drive the AD8279 with a low impedance source: for example, another amplifier. source resistance of even a few kilohms (k) can unbalance the resistor ratios and, therefore, significantly degrade the gain accuracy and common- mode rejection of the AD8279. because all configurations present several kilohms (k) of input resistance, the AD8279 does not require a high current drive from the source and so is easy to drive. input voltage range the AD8279 is able to measure input voltages beyond the supply rails. the internal resistors divide down the voltage before it reaches the internal op amp, and provide protection to the op amp inputs. figure 45 shows an example of how the voltage division works in a difference amplifier configuration. for the AD8279 to measure correctly, the input voltages at the input nodes of the internal op amp must stay below 1.5 v of the positive supply rail and can exceed the negative supply rail by 0.1 v. refer to the power supplies section for more details. 08308-046 r4 v in+ v in? r3 r1 r2 r2 r1 + r2 (v in+ ) r2 r1 + r2 (v in+ ) figure 45. voltage division in the difference amplifier configuration the AD8279 has integrated esd diodes at the inputs that provide overvoltage protection. this feature simplifies system design by eliminating the need for additional external protection circuitry, and enables a more robust system. the voltages at any of the inputs of the parts can safely range from +v s ? 40 v up to ?v s + 40 v. for example, on 10 v supplies, input voltages can go as high as 30 v. care should be taken to not exceed the +v s ? 40 v to ?v s + 40 v input limits to avoid risking damage to the parts.
preliminary technical data AD8279 rev. pra | page 17 of 18 power supplies the AD8279 operates extremely well over a very wide range of supply voltages. they can operate on a single supply as low as 2 v and as high as 36 v, under appropriate setup conditions. for best performance, the user must exercise care that the setup conditions ensure that the internal op amp is biased correctly. the internal input terminals of the op amp must have sufficient voltage headroom to operate properly. proper operation of the part requires at least 1.5 v between the positive supply rail and the op amp input terminals. this relationship is expressed in the following equation: v5.1 ?+< + s ref vv r2r1 r1 for example, when operating on a +v s = 2 v single supply and v ref = 0 v, it can be seen from figure 46 that the op amps input terminals are biased at 0 v, allowing more than the required 1.5 v headroom. however, if v ref = 1 v under the same conditions, the input terminals of the op amp are biased at 0.66 v (g = ?). now the op amp does not have the required 1.5 v headroom and can not function. therefore, the user needs to increase the supply voltage or decrease v ref to restore proper operation. the AD8279 are typically specified at single- and dual-supplies, but it can be used with unbalanced supplies as well; for example, ?v s = ?5 v, +v s = 20 v. the difference between the two supplies must be kept below 36 v. the positive supply rail must be at least 2 v above the negative supply and reference voltage. 08308-046 r4 r3 r1 r2 r1 r1 + r2 (v ref ) r1 r1 + r2 (v ref ) v ref figure 46. ensure sufficient voltage headroom on the internal op amp inputs use a stable dc voltage to power the AD8279. noise on the supply pins can adversely affect performance. place a bypass capacitor of 0.1 f between each supply pin and ground, as close as possible to each supply pin. use a tantalum capacitor of 10 f between each supply and ground. it can be farther away from the supply pins and, typically, it can be shared by other precision integrated circuits.
AD8279 preliminary technical data rev. pra | page 18 of 18 outline dimensions figure 47. 14-lead standard small outline package [soic_n] narrow body (r-14) dimensions shown in millimeters and (inches) ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. pr08445-0-8/09(pra)

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